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Description: 完整的DDR控制器设计，包含代码、仿真环境、FPGA综合网表等-full DDR controller ip,include rtl code,simulation environment and testbench, fpga synthesis netlist,etc.
Platform: |
Size: 337920 |
Author: zhangbin |
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Description: fpga控制CMOS相机ov5640采集图像，包括相机配置，ddr缓存，vga显示三个模块。直接可用-fpga control CMOS camera ov5640 capture images, including camera configuration, ddr cache, vga three display modules. Directly available
Platform: |
Size: 14336 |
Author: 高文 |
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Description: The Nexys4 DDR board is a complete, ready-to-use digital circuit
development platform based on the latest Artix-7™ Field
Programmable Gate Array (FPGA) Xilinx® . With its large,
high-capacity FPGA (Xilinx part number XC7A100T-1CSG324C),
generous external memories, and collection of USB, Ethernet, and
other ports, the Nexys4 DDR can host designs ranging from
introductory combinational circuits to powerful embedded
processors. Several built-in peripherals, including an
accelerometer, temperature sensor, MEMs digital microphone, a
speaker amplifier, and several I/O devices allow the Nexys4 DDR
to be used for a wide range of designs without needing any other
component-The Nexys4 DDR board is a complete, ready-to-use digital circuit
development platform based on the latest Artix-7™ Field
Programmable Gate Array (FPGA) Xilinx® . With its large,
high-capacity FPGA (Xilinx part number XC7A100T-1CSG324C),
generous external memories, and collection of USB, Ethernet, and
other ports, the Nexys4 DDR can host designs ranging from
introductory combinational circuits to powerful embedded
processors. Several built-in peripherals, including an
accelerometer, temperature sensor, MEMs digital microphone, a
speaker amplifier, and several I/O devices allow the Nexys4 DDR
to be used for a wide range of designs without needing any other
component
Platform: |
Size: 1024 |
Author: yaseenn |
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Description: This project has dependencies in the 'digilent' VHDL library. For your convenience
a local copy of these dependencies are included in the remote_sources directory.
The VmodCAM_Ref_HD demo project was built around an Atlys+VmodCAM setup.
The project configures the two cameras on the VmodCAM for maximum resolution
and frame rate, RGB output and video snapshot mode. The DDR memory on-board
the Atlys is used as a frame buffer. The two video feeds from both cameras are
bufferd in the DDR, while the FPGA drives the HDMI out port with either of the
cameras. Switch 7 selects the camera which gets displayed. The resolution of
the cameras (1600x1200) gets cropped to fit the display resolution of 1600x900.
Project built in ISE 13.2, tested in ISE 13.1.
Platform: |
Size: 13762560 |
Author: domnish |
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